Curator's Take
This article tackles a bottleneck that has been largely ignored as quantum hardware moves beyond single‑chip NISQ devices: how to orchestrate gate execution across multiple cores efficiently. By introducing a greedy, dependency‑aware scheduler that outperforms the traditional layered approach by roughly 40 % in makespan, the work demonstrates that software‑level parallelism can unlock much of the latent speedup promised by multi‑core architectures. The results signal that future quantum compilers will need to incorporate such fine‑grained scheduling to keep pace with hardware scaling, although real‑world gains will still depend on inter‑core communication overheads and error rates.
— Mark Eatherly
Summary
Multi-core quantum computing architectures have emerged as a promising solution to the qubit scalability limitations of monolithic NISQ devices. Quantum algorithms are expressed as quantum circuits composed of single- and two-qubit gates. However, circuit scheduling in multi-core quantum systems remains largely unexplored. Reducing overall execution time (makespan), increasing core utilization, and hiding communication latency behind computation depends on effective scheduling. In this paper, we first introduce a layered scheduling approach as a baseline where quantum gates within the same layer are executed in parallel, while layers themselves are executed sequentially. We then propose a greedy scheduling strategy which schedules each gate as soon as all its dependencies and required resources are available. This allows fine-grained parallelism across cores. Our evaluation shows that on real benchmarks, greedy scheduling achieves an average 40% reduction in makespan and improvement in core utilization. The results suggest that the use of intelligent circuit scheduling to exploit parallelism can greatly enhance the speed of circuit execution in multi-core quantum architectures.