hardware error_correction industry policy

UCLA-Led Consortium Secures $4 Million NSF Grant for 60 Logical Qubit Trapped-Ion Architecture

UCLA-Led Consortium Secures $4 Million NSF Grant for 60 Logical Qubit Trapped-Ion Architecture

Curator's Take

AI Commentary

This article is noteworthy because it earmarks a sizable $4 million NSF investment toward building a trapped‑ion processor capable of supporting 60 logical qubits—a scale that would put error‑corrected quantum hardware within striking distance of the thresholds needed for practical algorithms. The effort builds on recent advances in integrated photonic interconnects and surface‑trap designs, positioning UCLA’s consortium to compete with commercial ion‑trap roadmaps that are still targeting only a few dozen logical qubits. If successful, the platform could serve as an open‑access testbed for software developers and error‑correction research, accelerating the transition from noisy intermediate‑scale devices to fault‑tolerant quantum computers. However, achieving full logical operation at this size will still require breakthroughs in gate fidelity and crosstalk mitigation before real‑world applications become viable.

— Mark Eatherly

Summary

Installation of an integrated-photonics surface ion trap into an experimental vacuum system. The National Science Foundation (NSF) has selected a multidisciplinary team led by the University of California, Los Angeles (UCLA) to receive $4 million in funding. Awarded through the NSF’s National Quantum Virtual Laboratory (NQVL) initiative, the grant will support a new project titled [...] The post UCLA-Led Consortium Secures $4 Million NSF Grant for 60 Logical Qubit Trapped-Ion Architecture appeared first on Quantum Computing Report .