Curator's Take
This research exposes a critical blind spot in variational quantum algorithm development by revealing how real hardware constraints can dramatically alter circuit performance in ways that purely theoretical analysis misses. The finding that transpilation - the process of adapting circuits to run on actual quantum hardware - can change expressibility by over 125% and shift the fundamental trade-offs between a circuit's ability to represent quantum states versus its trainability is a wake-up call for the field. This work suggests that many VQA studies may be drawing conclusions from idealized circuits that don't reflect what actually runs on quantum processors, potentially explaining why some algorithms that look promising in simulation struggle when deployed on real hardware. The research provides essential guidance for developing more robust quantum algorithms by emphasizing the need to evaluate performance under realistic hardware constraints from the design stage.
— Mark Eatherly
Summary
Variational quantum algorithms (VQAs) rely on parameterized quantum circuits (PQCs), whose performance is governed by expressibility and trainability. Existing studies typically evaluate these properties at the logical circuit level, implicitly assuming that designed PQCs remain unchanged during hardware execution. In practice, however, hardware-aware transpilation modifies circuit structure through qubit mapping, routing, and basis decomposition, potentially altering PQC behavior. In this paper, we perform a systematic hardware-aware analysis of expressibility and trainability by comparing logical and transpiled PQCs across multiple ansatz families, qubit counts, and circuit depths. Expressibility is measured using fidelity-based KL divergence, while trainability is quantified through gradient variance. Our results show that transpilation acts as an implicit architectural perturbation, producing strongly ansatz-dependent effects. Expressibility deviations exceed upto 125% in some cases, while trainability variations reach up to 25%. Structured ansatzes are generally more robust, whereas highly entangled architectures are more sensitive to transpilation-induced transformations. We further show that transpilation can alter the commonly assumed expressibility-trainability trade-off, demonstrating that logical-level analyses may not reliably predict hardware-level behavior. These findings highlight the importance of hardware-aware evaluation for accurate characterization of VQAs.