hardware algorithms

A Variational Surrogate Approach to Finite-Horizon Quantum Control via Hardware-Efficient Ansatz

Curator's Take

AI Commentary

This article shows how a hardware‑efficient variational circuit can serve directly as a “surrogate” for time‑dependent control fields, turning the finite‑horizon quantum control problem into a standard VQA that runs on near‑term devices. By sidestepping explicit pulse synthesis and reachability constraints, it builds on recent advances in quantum optimal control and hardware‑aware ansätze, offering a more implementation‑friendly route to high‑fidelity state transfer across multiple qubits. The results also flag the familiar trade‑off between circuit depth (expressivity) and classical optimization difficulty, highlighting both the promise and the scaling challenges that will shape future NISQ‑level control strategies.

— Mark Eatherly

Summary

We present a variational quantum framework for finite-horizon quantum control based on hardware-efficient ansätze. The objective is to steer a quantum system from a given initial state to a desired target state over a fixed time horizon by minimizing a terminal cost defined in terms of state fidelity. Instead of explicitly synthesizing time-dependent control fields or enforcing Hamiltonian reachability constraints, the proposed method reformulates the control objective as a variational optimization problem in which a hardware-efficient parameterized quantum circuit provides a surrogate parameterization of the terminal evolution. The circuit consists of alternating layers of single-qubit rotations and entangling gates, whose parameters are optimized using classical routines to minimize the terminal infidelity. This formulation avoids reliance on problem-specific or physics-inspired ansätze, providing a flexible and implementation-friendly approach compatible with near-term quantum devices. Numerical experiments on multi-qubit state-transfer benchmarks demonstrate high-fidelity state transfer while highlighting the trade-off between ansatz expressivity, optimization complexity, and scalability with respect to system size and circuit depth.