Curator's Take
AI Commentary
This article delivers the first scalable technique for rigorously certifying quantum code and circuit distances, turning previously heuristic upper‑bounds into provable exact values even for codes as large as 31 200 qubits and memory circuits with hundreds of thousands of fault mechanisms. By exposing overestimated distances in ten recent papers and showing how schedule tweaks can recover lost error‑suppression on IBM’s two‑gross memory blocks, the work directly sharpens resource estimates and helps hardware teams decide which partially defective chips remain usable. The ability to certify true distance at this scale is a crucial step toward reliable fault‑tolerant architectures, though the dynamic‑programming approach still demands substantial classical compute power for the biggest instances.
— Mark Eatherly
Summary
Code and circuit distances characterize how strongly quantum error correction suppresses logical errors and guide code comparisons, schedule choices and resource estimates. Yet many published distances are only upper bounds from heuristic searches. Here, we express both distances as tropical partition functions and evaluate them with rank-based dynamic programming and weight-bounded search. Circuit reductions and relaxations shrink the problems, and proved lower bounds with explicit logical errors of matching weight certify exact values. On two benchmarks, our method certifies more instances than all other tested exact solvers combined. We certify distances for codes with up to 31,200 qubits, such as Google's modular hyperbolic codes, and for memory circuits with up to $8\times10^5$ fault mechanisms, such as those of high-rate Cornucopia codes. Our audit of 26 recent papers identifies overestimated distances and non-tight upper bounds in 10 papers, with a maximum discrepancy of at least eight. Certified distances also guide circuit design and show which defective chips remain usable. In particular, we certify circuit distance 16 for IBM's two-gross memory circuits with the standard schedule, not the assumed 18, whereas redesigned schedules reach 18 at one noisy cycle, at the cost of one more timestep per cycle. At 99.98% junction yield, keeping gross-code memory blocks with dead checks that are certified at distance 10 or more raises the estimated usable share from 53% for perfect blocks alone to 94% with an improved schedule.